Pnevmatikatos Dionιsios

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Full Name:Pnevmatikatos Dionιsios
Category:Faculty (Faculty)
Academic Level:Professor
Academic Department:ECE (School of Electrical & Computer Engineering)
Telephone:+302821037344, +302821037547
Location:Office: 145Α-25,-26, Science/ECE Building (Λ), 2nd Floor


Speciality: Computer Architecture, Reconfigurable Systems, Application Acceleration, High-performance and low power system design and implementation, reliability and fault tolerance.

Short CV: Dionisios Pnevmatikatos is Professor and former Chair of the School of Electronic and Computing Engineering, Technical University of Crete, where he serves since 2000. He is also the Director of the Microprocessor and Hadware Laboratory. Between March 1997 and August 2000, he was Researcher at ICS-FORTH, and a Visiting Faculty Member at the University of Crete. His research interests are in the broader area of Computer Architecture, where he investigates the Design and Implementation of High-Performance and Cost-Effective Systems, Reliable System Design, and Reconfigurable Computing. Within this context, he has performed research in Networking Hardware and Network Processors, Application Acceleration, Custom and Application-Specific Architectures, and Hardware Acceleration of Bioinformatics Algorithms. He holds a US patent and has published more than 70 articles in international conferences and journals. He has served on the program committees of numerous international conferences, was the Program Co-Chair of the 21st International Conference on Field Programmable Logic and Applications (FPL), and was the Chair and Vice Chair in the Architecture and Microarechitecture Track of the Design and Test Europe (DATE) conference in years 2007-2010. He was the General Co-Chair of the 2008 Panhellenic Conference on Informatics (PCI) and of the International Workshop on Rapid System Prototyping (RSP) in 2007, and has been a member of the Technical Program Committee in many of the key international conferences of his field. He has been coordinator, and principal investigator at several competitive EU and national funded research projects.

At FPL 2015 his publication "Fast, large-scale string match for a 10Gbps FPGA-based network intrusion detection system" was "among 27 papers which have significantly influences theory and practice in the field over the last 25 year of the conference".

On September 2015, Google Scholar gave more than 2000 citations to his work and an H-index of 22.


  • Ph.D. Computer Science, University of Wisconsin-Madison, May 1996.Advisor:Guri Sohi
    Thesis Title: "Incorporating Guarded Execution in Existing InstructionSets''
  • M.Sc. Computer Science, University of Wisconsin-Madison, 1991
  • B.Sc. Computer Science, University of Crete, Greece, 1989

Research Areas: His research interests focus on the wider area of Computer Architecture with emphasis on high-performance, low power techniques, parallel/multi-core architectures, reconfigurable systems, reliability and fault tolerance, design and simulation tools, as well as custom architectures for application acceleration (network/packet processing, bioinformatics, etc).

Sector: Electronics and Computer Architecture 

Laboratory: Microprocessor and Hardware 


  • (HRY 201) Digital Computers,
  • (HRY 312) Computer Organization,
  • (HRY 411) Computer Architecture,
  • (HRY 411) Parallel Computer Architecture
© Technical University of Crete 2012